1. Field of the Invention
The present invention relates to liquid crystal display devices and manufacturing methods thereof. More particularly, the present invention relates to a liquid crystal display device that suffers less from a short circuit occurring in an auxiliary capacitance forming region, that can increase an auxiliary capacitance without reducing the aperture ratio of each pixel, and that is suitable for a relatively small pixel area or for achieving high definition, and relates to a manufacturing method of such a liquid crystal display device.
2. Description of Related Art
In recent years, liquid crystal display devices have come to be used widely not only in information communications apparatuses but also in commonly used electric apparatuses. The liquid crystal display device is built with: a pair of substrates that are made of glass, for example, and have an electrode and the like formed on the surface thereof, and a liquid crystal layer formed between the pair of substrates. When a voltage is applied to the electrode formed on the substrate, the liquid crystal molecules are re-oriented, and accordingly the transmittance of light is changed. In this way, the liquid crystal display device displays various images.
On the surface of one substrate of such a liquid crystal display device, scanning lines and signal lines are arranged so as to form a matrix. In each region surrounded by those lines, provided is an array substrate in which a thin-film transistor (TFT) that serves as a switching element for driving liquid crystal, a display electrode that applies a voltage to the liquid crystal, and an auxiliary capacitance line that constitutes an auxiliary capacitance for retaining signals are formed. On the surface of the other substrate thereof, provided is a color filter substrate on which, for example, color filters of different colors including red (R), green (G), and blue (B) and a common electrode are formed. Between the two substrates described above, the liquid crystal is sealed.
The auxiliary capacitance line formed on the array substrate is provided to form an auxiliary capacitance that retains the electric charge of a signal fed from a signal line for a given time period. In general, the auxiliary capacitance is formed as a capacitor in which part of the auxiliary capacitance line serves as one electrode, part of the drain or pixel electrode of the TFT serves as the other electrode, and a gate insulating film coating the gate electrode of the TFT serves as a dielectric. Incidentally, the auxiliary capacitance line is generally formed of a light-shielding conductive material such as aluminum, molybdenum, or chromium.
Now, from the viewpoint of preventing crosstalk or flicker in the liquid crystal display device, the larger the auxiliary capacitance, the better. However, as the liquid crystal display device becomes more compact and achieves higher definition due to recent technological innovation, the size of individual pixels is reduced. This makes it practically difficult to provide a large auxiliary capacitance.
As a technology that can solve this problem, there has conventionally been known a liquid crystal display device disclosed in JP-A-2005-506575. An array substrate 70 of this liquid crystal display device will be described with reference to FIGS. 8A and 8B. FIG. 8A is a plan view of the array substrate, and FIG. 8B is a sectional view taken on the line X-X of FIG. 8A.
The array substrate 70 has, on top of an insulating substrate 71, scanning lines 72, auxiliary capacitance lines 73, auxiliary capacitance patterns 74, a gate insulating film 75, a semiconductor pattern 76, signal lines 77, auxiliary capacitance conductive patterns 78, pixel electrodes 79, a protective insulating film 80, contact holes 81, and openings 82. Furthermore, thin-film transistors TFT each having a gate electrode G, a source electrode S, and a drain electrode D are provided one for each of the pixels.
The auxiliary capacitance is formed with the auxiliary capacitance pattern 74 and the auxiliary capacitance conductive pattern 78 that overlap one another with the gate insulating film 75 laid therebetween. With this configuration, as compared with a configuration in which an auxiliary capacitance is formed with the auxiliary capacitance pattern 74 and the pixel electrode 79 that overlap one another, it is possible to offer a larger capacitance if these configurations are equal in the overlapping area.
In the array substrate 70 of the liquid crystal display device disclosed in JP-A-2005-506575, the gate insulating film 75 serves as a dielectric. Thus, on the array substrate 70, the auxiliary capacitance can be increased by making the gate insulating film 75 thinner. However, when the gate insulating film 75 itself is made thinner, it becomes difficult to maintain electrical isolation between the gate electrode G and the scanning line 72 that are coated with the gate insulating film 75 and other members.
To solve this problem, Japanese Patent No. 2,584,290 proposes a liquid crystal display device 90. An array substrate of the liquid crystal display device 90 will be described with reference to FIG. 9 and FIGS. 10A to 10G FIG. 9 is a plan view showing a few pixels of the array substrate disclosed in Japanese Patent No. 2,584,290, and FIGS. 10A to 10G are partial sectional views sequentially showing the manufacturing process of the array substrate shown in FIG. 9.
First, an auxiliary capacitance line 92 made of ITO (indium tin oxide) is formed and patterned on an insulating substrate 91 made of a glass plate, followed by the formation and patterning of a gate metal film 93 (FIG. 10A).
Then, by plasma chemical vapor deposition (CVD) or the like, an insulating film 94 made of SiNx or SiOx, an amorphous semiconductor film 95 that serves as an active layer and is made of a-Si, for example, and an impurity-doped ohmic contact semiconductor film 96 made of an n+a-Si film, for example, are formed in succession (FIG. 10B). At this point, the film thickness A of the insulating film 94 is set so as to be thick enough to prevent a short circuit between the drain and the gate and between the source and the gate; for example, the film thickness thereof is set so that X=4000 Å.
Next, etching is performed on the ohmic contact semiconductor film 96 and the amorphous semiconductor film 95 by using the same resist so as to form a given pattern (FIG. 10C). Then, a resist (not shown in FIGS. 10A to 10G) is applied that is patterned so as to have an opening in its portion (the portion surrounded by dashed line in FIG. 9) where the auxiliary capacitance line 92 and a display transparent electrode 97, which is formed in the following process, will overlap. Then, etching is performed thereon by using an etchant for the insulating film 94 so that the insulating film 94 achieves a desired film thickness (Y=2000 Å) as an auxiliary capacitance insulating film (FIG. 10D).
Next, the display transparent electrode 97 made of ITO is formed and patterned (FIG. 10E). Then, a drain-and-source metal film 98 is formed and patterned (FIG. 10F), and etching is then performed to remove the ohmic contact semiconductor film 96 left in the channel portion of the TFT. In this way, the array substrate for a liquid crystal display device is obtained (FIG. 10G). The array substrate thus obtained is placed so as to face a common electrode substrate with a liquid crystal material laid in between, whereby the liquid crystal display device 90 is obtained.
In the conventional technology described above, an auxiliary capacitance electrode portion of the auxiliary capacitance line 92 and the pixel electrode 97 correspond to the electrodes of a capacitor, and the insulating film 94 present between the auxiliary capacitance electrode portion of the auxiliary capacitance line 92 and the pixel electrode 97 corresponds to the dielectric of the capacitor. In this example, while the thickness X of the insulating film 94 laid on the gate electrode 93 is 4000 Å, the thickness Y of the insulating film 94 laid on the auxiliary capacitance line 92 is 2000 Å. This advantageously prevents a short circuit from easily occurring between the drain and the gate and between the source and the gate, and helps secure a required auxiliary capacitance without increasing the area of the auxiliary capacitance line 92.
On the array substrate of the liquid crystal display device 90 disclosed in Japanese Patent No. 2,584,290, the thickness of only the gate insulating film laid on the surface of the auxiliary capacitance electrode portion of the auxiliary capacitance line 92 is made partially thinner by etching. By doing so, the auxiliary capacitance is increased while maintaining electrical isolation between the gate electrode and the scanning line that are coated with the gate insulating film and other members.
However, it was found that just making thinner the gate insulating film laid on the surface of the auxiliary capacitance line cannot prevent a short circuit from easily occurring between the auxiliary capacitance electrode portion and an upper auxiliary capacitance electrode that is placed face to face with the auxiliary capacitance electrode portion.
As a result of an intensive research on the causes of a short circuit that occurs between an auxiliary capacitance electrode portion and an upper auxiliary capacitance electrode when an auxiliary capacitance is formed by using an insulating film that is formed by partially making thinner an insulating film laid on the surface of the auxiliary capacitance electrode portion, the inventors of the present invention have found out that a terminal portion provided in the signal lines, the scanning lines, etc., for receiving a driving signal inputted from the outside, for instance, is responsible for such a short circuit.
That is, at the time of manufacturing, an insulating film including a passivation film is laid on the upper auxiliary capacitance electrode and the terminal portion. This insulating film is removed by etching in the following process, so that the upper auxiliary capacitance electrode and the terminal portion are exposed.
At this point, the thickness of the insulating film laid on the terminal portion is significantly thicker than that of the insulating film laid on the upper auxiliary capacitance electrode. This is because the insulating film laid on the terminal portion includes not only the insulating film laid on the upper auxiliary capacitance electrode but also a gate insulating film.
Thus, even when etching of the insulating film laid on the upper auxiliary capacitance electrode is completed, etching of the insulating film laid on the terminal portion is not yet completed. As a result, until etching of the insulating film laid on the terminal portion is completed, the unprotected upper auxiliary capacitance electrode is continuously exposed to an etching atmosphere. This results in damage to the insulating film present between the auxiliary capacitance electrode portion and the upper auxiliary capacitance electrode.
In this case, if an insulating film having a sufficient thickness is present between the auxiliary capacitance electrode portion and the upper auxiliary capacitance electrode, damage, if any, to the upper auxiliary capacitance electrode causes very few problems.
However, this is not the case with a configuration in which the space between the auxiliary capacitance electrode portion and the upper auxiliary capacitance electrode is greatly reduced to increase the auxiliary capacitance. In such a configuration, due to the damage to the upper auxiliary capacitance electrode, part of the upper auxiliary capacitance electrode breaks a thin insulating film laid under it, and is then short-circuited with the auxiliary capacitance electrode portion.
The inventors of the present invention reviewed the configuration of the insulating film laid on the upper auxiliary capacitance electrode and the terminal portion and also reviewed the manufacturing process, and have found out that it is possible to greatly reduce the occurrence of a short circuit between the auxiliary capacitance electrode portion and the upper auxiliary capacitance electrode portion.